A 250 MHz dual port cursor RAM using dynamic data alignmentarchitecture

摘要

This paper describes a dual port cursor RAM operating in realntime. Cursor RAMs have been composed of two memory planes. The pixelnport requires data from both planes at the same time. However, this hasnnot been realized so far because each port defines its address spacendifferently. A dynamic data alignment architecture coordinates thesendifferent requests. This architecture reduces a large amount of controlncircuits and makes it possible to operate in real time. The RAM isnfabricated in a double metal 0.5 μm CMOS process technology. Thenactive area is 1.5×1.6 mm including a couple of shift registers.nIt operates up to 263 MHz at the supply voltage of 3.3 V