A Comparison of MOS Varactors in Fully-Integrated CMOS LC VCO's at 5 and 7 GHz

摘要

This paper examines the effect of the choice of MOS varactor on the performance of a CMOS negative resistance oscillator. The three most common MOS varactor structures (inversion, accumulation, and gated varactor) are combined with a spiral inductor over either deep trench oxide or a polysilicon patterned ground shield, to implement a matrix of six LC VCO's in a 0.24-μm (0.18-μm L_(eff)) SiGe BiCMOS technology. Typical measured VCO phase noise is -119.7 dBc/Hz at a 1-MHz offset from a 5.67-GHz carrier, while drawing 1.6 mA from a 1.5-V supply, for a VCO figure of merit of -191 dBc/Hz.