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Nonlinear noise analysis of LC-tuned CMOS VCOs and extrinsic noise effects.

机译:LC调谐CMOS VCO的非线性噪声分析和外部噪声影响。

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摘要

This thesis considers the noise performance of CMOS LC-VCOs. It is motivated by the challenges that the oscillator noise specification presents to designers of large mixed-mode systems. It treats this issue on a theoretical level and on a design level. On the theoretical level, this work presents an analytical method for examining the noise behaviour of fully-integrated, resonator-based VCOs. This is intended to give designers a more fundamental insight into the LC-oscillator's noise performance without the need for an exhaustive use of the simulator. In the analysis, the oscillator is distilled to its simplest dynamic model: a nonlinear second-order stochastic differential equation. Nonlinear expressions for common oscillator topologies are derived and integrated into the second-order model. A variety of intrinsic and extrinsic noise models are included as well. Asymptotic solution methods are combined with the correlation theory to produce closed-form expressions for the phase noise. These techniques readily account for a number of important properties including: state-dependent noise, positive feedback, AM-PM conversion, large phase deviations and noise modulation. The analysis is verified in simulation with SPECTRE and experimentally with integrated VCO measurements.; On the design level, this thesis considers methods of shielding oscillators from extrinsic noise. To this end, a fully-monolithic 2.4-GHz 0.18-mum CMOS LC-VCO with enhanced supply rejection is proposed and designed. Isolating the tank and switching core from the power and ground lines, the effect of supply disturbances on the VCO are reduced by 40 dB, more than a 30-dB improvement over other fully-monolithic LC-VCOs. Further, this scheme does not compromise the oscillator's tuning sensitivity, allowing a 1-GHz (38%) tuning range. At a power dissipation of 11 mW, the measured phase noise at 100-kHz offset from a 2.9-GHz carrier is -105 dBc/Hz. Also, recognizing that typical varactor designs make LC-oscillators susceptible to common-mode disturbances a new MOS-varactor structure capable of rejecting such noise is proposed. Simulation results indicate a 5-times improvement in common-mode noise rejection for the new structure.
机译:本文考虑了CMOS LC-VCO的噪声性能。振荡器噪声规范给大型混合模式系统的设计人员带来的挑战是其动机。它在理论水平和设计水平上都处理此问题。从理论上讲,这项工作提出了一种分析方法,用于检查基于谐振器的完全集成VCO的噪声行为。这旨在使设计人员能够更深入地了解LC振荡器的噪声性能,而无需完全使用模拟器。在分析中,将振荡器提炼为最简单的动力学模型:非线性二阶随机微分方程。推导了常见振荡器拓扑的非线性表达式,并将其集成到二阶模型中。还包括各种内在和外在的噪声模型。渐近解方法与相关理论相结合,以产生相位噪声的闭式表达式。这些技术很容易说明许多重要的特性,包括:与状态有关的噪声,正反馈,AM-PM转换,大的相位偏差和噪声调制。分析通过SPECTER仿真进行验证,并通过集成VCO测量进行实验验证。在设计层面上,本文考虑了屏蔽振荡器免受外部噪声影响的方法。为此,提出并设计了具有增强电源抑制性能的全单片2.4GHz 0.18um CMOS LC-VCO。将储罐和开关核心与电源线和地线隔离开来,电源干扰对VCO的影响减少了40 dB,比其他全单片LC-VCO改善了30 dB以上。此外,该方案不会损害振荡器的调谐灵敏度,允许1 GHz(38%)的调谐范围。功耗为11 mW时,从2.9 GHz载波偏移100 kHz时测得的相位噪声为-105 dBc / Hz。另外,认识到典型的变容二极管设计使LC振荡器容易受到共模干扰,因此提出了一种能够抑制这种噪声的新型MOS变容二极管结构。仿真结果表明,新结构的共模噪声抑制性能提高了5倍。

著录项

  • 作者

    Magierowski, Sebastian C.;

  • 作者单位

    University of Toronto (Canada).;

  • 授予单位 University of Toronto (Canada).;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2004
  • 页码 257 p.
  • 总页数 257
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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