Reliable Operation of Thick-Film Chip Resistors under Pulsed Conditions

摘要

Continuous increase in pulse-related electronic applications makes a pulse load capability an important characteristic of a flat chip resistor -prevailing style of the modern resistors. In the previous paper "Safe pulse loading of thick-film chip resistor" the theoretical methods were developed for calculation of temperature and stress in pulse loaded flat chip resistor. The objective of the present paper is experimental verification of the developed theory. The experiments were performed on newly developed Vishay pulse-resistant thick-film chip resistors of standard sizes. The resistors were subjected to two types of destructive load: (a) single square-wave electrical pulse, (b) series of 10,000 square-wave electrical pulses. Minimum value of pulse power that resulted in resistor failure (for a given pulse duration) was registered together with the appropriate failure mode. The authors observed three failure modes of the tested resistors: (a) burnout of resistive film, (b) substrate cracking, (c) fatigue cracking of solder joint between resistor and PCB. It has been found that each failure mode correlates to particular range of pulse duration. Good agreement was established between theoretically evaluated and experimentally determined parameters of destructive pulses.