An adaptive wide-range phase-locked loop

摘要

This paper presents an adaptive wide-range phase-locked loop (PLL) including a range-programmable voltage-controlled oscillator (VCO). Differ from traditional programming methods, the PLL adopts an adaptive module to realize automatic configuration. This adaptive module measures the accumulation of phase difference, and turns it into digital codes adaptively in capture process. With the normal adjustment of charge pump (CP), the participation of adaptive module broadens the frequency range and shortens the acquisition time. Fabricated in the 65nm CMOS technology, the proposed PLL can yield clock signals ranging from 1.25GHz to 5GHz with a supply voltage 1V. Its power dissipation is 1.03mW~5.47mW proportional to different operation frequency. The measured jitter and locking time at maximum operation frequency are 6.97ps and 15us, respectively.