National key Lab. of Science and Technology on Communications, University of Electronic Science and Technology of China, Chengdu, 611731, China;
National key Lab. of Science and Technology on Communications, University of Electronic Science and Technology of China, Chengdu, 611731, China;
National key Lab. of Science and Technology on Communications, University of Electronic Science and Technology of China, Chengdu, 611731, China;
National key Lab. of Science and Technology on Communications, University of Electronic Science and Technology of China, Chengdu, 611731, China;
National key Lab. of Science and Technology on Communications, University of Electronic Science and Technology of China, Chengdu, 611731, China;
University of Minnesota, Minneapolis, MN, 55455, USA;
Random access memory; Hardware; Registers; Kernel; Energy efficiency; Convolution; Field programmable gate arrays;
机译:SLIT:用于深卷积神经网络的节能可重新配置硬件架构
机译:用于卷积神经网络的高效节能的粗粒度空间体系结构AlexNet
机译:Eyeriss:卷积神经网络的节能数据流的空间架构
机译:基于FPGA的深度卷积神经网络的节能架构,具有二进制权重
机译:流水线训练与深卷积神经网络的陈旧重量
机译:基于Memristor的二元卷积神经网络架构可配置神经元
机译:Chain-NN:一种节能的一维链式架构,用于加速 深度卷积神经网络