Advanced Reliable Systems (ARES) Lab., Department of Electrical Engineering, National Central University, Taoyuan, Taiwan 320;
Advanced Reliable Systems (ARES) Lab., Department of Electrical Engineering, National Central University, Taoyuan, Taiwan 320;
Advanced Reliable Systems (ARES) Lab., Department of Electrical Engineering, National Central University, Taoyuan, Taiwan 320;
Information and Communication Research Laboratories, Industrial Technology Research Institute, Hsinchu, Taiwan 310;
Information and Communication Research Laboratories, Industrial Technology Research Institute, Hsinchu, Taiwan 310;
Information and Communication Research Laboratories, Industrial Technology Research Institute, Hsinchu, Taiwan 310;
Information and Communication Research Laboratories, Industrial Technology Research Institute, Hsinchu, Taiwan 310;
Built-in self-test; Random access memory; Clocks; Delays; Process control; Phased arrays;
机译:内置3D堆叠式宽I / O DRAM的自检设计
机译:内置自检功能,用于嵌入式DRAM中的偏置温度不稳定性,热载流子注入和栅氧化层击穿
机译:基于处理器的嵌入式DRAM内置自检
机译:基于频道的DRAM的软件 - 硬件合作的内置自检方案
机译:针对模拟和混合信号设备的内置自检方案。
机译:具有数字内置自检功能的MEMS加速度计的ΣΔ闭环接口
机译:Symbist:基于对称的模拟和混合信号内置的功能安全性的自检