Improved and evolutionary software based scheduling technique for embedded cores

摘要

Fault detection or coverage measurement with the help of Built-in self-test (BIST) is a technique using test patterns employing embedded hardware components which generates the response and the components which analyzes these responses. This method does not require any external tester as fault testing is performed at the speed in line with the testee. As a result of this, it faces the difficulties like Area overhead, Performance penalties. The design time and efforts needed are more. By exploiting programmability and using on-chip resources a new technique called Software-based self-test (SBST) scheduling is introduced which excludes the requirement as in previous methods. In this paper, evolutionary Software based scheduling test development on to a RISC MIPS Processor (An Embedded Core designed & implemented in VHDL) is proposed. Design of Instructions set Instruction Set and logic of data transfer using registers are the key features to generate this test development. The designed core will then test functional fault detection on the execution of the self-test programs and scheduling is also proposed.