National Key Laboratory of Communications, University of Electronic Science and Technology of China, Chengdu 611731, China;
National Key Laboratory of Communications, University of Electronic Science and Technology of China, Chengdu 611731, China;
National Key Laboratory of Communications, University of Electronic Science and Technology of China, Chengdu 611731, China;
Propagation delay; Timing; Inverters; CMOS technology; Markov random fields; Circuit synthesis;
机译:漏极引起的势垒降低对在阈值以下区域工作的超低电源CMOS电路性能的影响
机译:模拟工艺,电源电压和温度变化对纳米数字电路时序响应的影响
机译:模拟工艺,电源电压和温度变化对纳米数字电路时序响应的影响
机译:基于MRF的电路电路电路的定时性能
机译:低电源电压的耐PVT逆变器电路设计
机译:基于超高纯度半导体碳纳米管的低压高性能柔性数字和模拟电路
机译:采用双阈值电压的低功耗双电源电压CmOs电路的电平转换器