首页> 外文会议>2016 IEEE Asian Solid-State Circuits Conference >A 83 peak efficiency 1.65 V to 11.4V dynamic voltage scaling supply for electrical stimulation applications in standard 0.18μm CMOS process
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A 83 peak efficiency 1.65 V to 11.4V dynamic voltage scaling supply for electrical stimulation applications in standard 0.18μm CMOS process

机译:83%的峰值效率1.65V至11.4V动态电压缩放电源,用于标准0.18μmCMOS工艺中的电刺激应用

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In this paper, we present a dynamic voltage scaling supply (DVSS) for electrical stimulation applications. The core architecture of the proposed DVSS is based on a 7x series-parallel charge pump structure. It converts 1.65V DC input into N × 1.65V DC output in which the number of N can be dynamically scaled from 1 to 7. The DVSS circuit consumes a static power of 20μW and achieves a peak efficiency of 83.3% under a constant current load of 500μA at output voltage of 3 × 1.65V. The DVSS circuit has a fast response time of 146ns when switching from standby to the maximum 11.4V output. It has an intrinsic energy recycling mechanism to effectively reduce the energy wastage when switching DVSS from active to standby state. The DVSS circuit is designed and implemented in a standard 0.18μm CMOS process without high-voltage (HV) transistor option, which saves mask cost and provides possibility for HV stimulation system to be designed and integrated in more advanced technology node.
机译:在本文中,我们介绍了一种用于电刺激应用的动态电压定标电源(DVSS)。提议的DVSS的核心架构基于7x串并联电荷泵结构。它将1.65V直流输入转换为N×1.65V直流输出,其中N的数量可以动态地从1缩放到7。DVSS电路消耗20μW的静态功率,在恒定电流负载下的峰值效率达到83.3%。输出电压为3×1.65V时为500μA。从待机状态切换到最大11.4V输出时,DVSS电路具有146ns的快速响应时间。它具有固有的能量回收机制,可有效减少DVSS从活动状态切换到待机状态时的能量浪费。 DVSS电路采用标准的0.18μmCMOS工艺设计和实现,无需使用高压(HV)晶体管选件,从而节省了掩模成本,并为将HV刺激系统设计和集成到更先进的技术节点中提供了可能性。

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