DAC for positron emission tomography front-end

摘要

Positron emission tomography architectures have been traditionally dependent on zero crossing discriminators, external voltage references, or fixed voltage references with restricted voltage steps. This paper presents a digital-to-analog converter (DAC) utilized to set the threshold voltages of Time-of-Flight Positron Emission Tomography (TOF-PET) comparators. The DAC circuit uses a charge redistribution architecture, and all the required building blocks have been fully integrated in a 90 nm CMOS process with an area of 170 × 65 µm². The power consumption is 324 µW with 1.2-V supply voltage. Using a 10-MHz clock, this DAC achieves an effective number of bits (ENOB) of 8.2.