首页> 外文会议>2014 IEEE International Interconnect Technology Conference / Advanced Metallization Conference >2D vs 3D integration: Architecture-technology co-design for future mobile MPSoC platforms
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2D vs 3D integration: Architecture-technology co-design for future mobile MPSoC platforms

机译:2D与3D集成:面向未来移动MPSoC平台的架构技术共同设计

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3D stacked ICs (3D-SIC) are viable alternatives to overcome limitations faced by mobile MPSoC platforms in 2D designs. In this paper, we evaluate 2D-ICs and 3D-SICs (memory-on-logic) at system architecture level for a complex MPSoC platform instantiated for wireless PHY processing (WLAN, LTE). For a 10-core heterogeneous MPSoC instantiation, we compare its implementations as 2D-IC and 3D-SIC (based on Cu-Cu bonding), and for two different level-1 data memory organization and communication bus structure. We also analyse impact of system level choices (memory organization, communication structure) for both 2D and 3D interconnects.
机译:3D堆叠式IC(3D-SIC)是克服2D设计中移动MPSoC平台面临的局限性的可行替代方案。在本文中,我们针对为无线PHY处理(WLAN,LTE)实例化的复杂MPSoC平台,在系统体系结构级别评估了2D-IC和3D-SIC(逻辑内存)。对于10核异构MPSoC实例化,我们将其实现方式比较为2D-IC和3D-SIC(基于Cu-Cu键),以及两种不同的1级数据存储组织和通信总线结构。我们还分析了2D和3D互连的系统级别选择(内存组织,通信结构)的影响。

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