Sch. of Comput. Sci., Open Univ. of the Netherlands, Heerlen, Netherlands;
integrated circuit modelling; multiprocessing systems; network-on-chip; telecommunication channels; telecommunication networks; STMicroelectronics; communication channel; deadlock detection; formal analysis; inductive invariants; microarchitectural models; multicore era; multiprocessor system-on-chips; network-on-chips; on-chip communication networks; symbolic channel type inference; xMAS language; Algorithm design and analysis; Color; Computational modeling; Data structures; Inference algorithms; Payloads; Switches;
机译:在片上通信网络中具有通道开路故障的最大连接测试
机译:毫米波和太赫兹频段无线网络上芯片通信的信道建模与表征
机译:基于超宽带的无线体积网络中体表通信的通道模型
机译:芯片通信网络微型架构模型中的信道类型推断
机译:干扰对无线通信网络中连接性和中断性能的影响:基于干扰的信道模型。
机译:未来5G无线通信网络的实验性毫米波室内信道的统计建模和表征
机译:突发流量下片上网络的性能建模和评估。在具有虚拟通道的突发流量下,具有胖树拓扑的NOC中使用分析和仿真模型对通信网络进行性能评估。