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Analog design procedures for channel lengths down to 20 nm

机译:通道长度低至20 nm的模拟设计程序

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A new design procedure is derived for analog design with MOSTs in all three regions of operation i.e. strong and weak inversion and velocity saturation. BSIM6/EKV model parameters are used. Optimum biasing points are derived for single- and two-stage amplifiers. It is shown that for channel lengths around 20 nm, a unique optimum is achieved for the fT × gm/IDS Figure of merit. At such low channel lengths noise and distortion establish severe limitations in dynamic range. They can be mitigated by the use of negative resistors, as used in an increasing number of amplifier and filter configurations. An overview is given of such circuit configurations.
机译:对于在所有三个工作区域(即强反弱和速度饱和)中具有MOST的模拟设计,得出了一种新的设计程序。使用BSIM6 / EKV模型参数。可以为单级和两级放大器得出最佳偏置点。结果表明,对于20 nm左右的通道长度,fT×gm / IDS品质因数实现了独特的最佳性能。在如此低的通道长度下,噪声和失真会在动态范围内造成严重限制。如越来越多的放大器和滤波器配置中所使用的那样,可以通过使用负电阻来缓解这些问题。给出了这种电路配置的概述。

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