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Exploring the energy efficiency of Multispeculative Adders

机译:探索多投机加法器的能效

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Variable Latency Adders are attracting strong interest for increasing performance at a low cost. However, most of the literature is focused on achieving a good area-delay tradeoff. In this paper we consider multispeculation as an alternative for designing adders with low energy consumption, while offering better performance than the corresponding non-speculative ones. Instead of introducing more logic to accelerate the computation, the adder is split into several fragments which operate in parallel, and whose carry-in signals are provided by predictor units. On the one hand, the critical path of the module is shortened, and on the other hand the frequent useless glitches produced in the carry propagation structure are diminished. Hence, this will be translated into an overall energy reduction. Several experiments have been performed with linear and logarithmic adders, and results show energy savings by up to 90% and 70%, respectively, while achieving an additional execution time decrease. Futhermore, when utilized in whole datapaths with current control techniques, it is possible to reduce execution time by 24.5% (34% best case) and energy by 32% (48% best case) on average.
机译:可变延迟加法器以低成本提高性能引起了人们的浓厚兴趣。但是,大多数文献都集中在实现良好的面积延迟权衡上。在本文中,我们将多重推测作为设计低能耗加法器的替代方法,同时提供了比相应的非推测性加法器更好的性能。加法器没有引入更多的逻辑来加速计算,而是分成了几个并行运行的片段,其进位信号由预测器单元提供。一方面,缩短了模块的关键路径,另一方面减少了在进位传播结构中产生的频繁的无用毛刺。因此,这将转化为总体能耗的降低。使用线性和对数加法器进行了几次实验,结果表明分别节省了多达90%和70%的能量,同时又减少了执行时间。此外,使用当前的控制技术在整个数据路径中使用时,平均可以将执行时间减少24.5%(最佳情况为34%),将能量平均减少32%(最佳情况为48%)。

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