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A low noise, high PSR low-dropout regulator for low-cost portable electronics

机译:用于低成本便携式电子产品的低噪声,高PSR低压降稳压器

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This paper presents A low noise, high PSRR low-dropout regulator for low-cost portable electronics. The proposed LDO uses an Operational Transconductance Amplifier (OTA) with Miller R-C compensation to ensure a stable phase margin greater than 62°. The active chip of the proposed regulator is only 150×680 um2. The design was simulated and lyouted in Cadence using mixed-signal 90 nm 2P9M CMOS process, the simulation results show that this LDO output voltage can achieves line regulation of less than 0.10% and load regulation of better than 0.25% and a low quiescent current of only 90uA and ultra-low noise of only 65 nV/SqrtHz. Moreover, it can achieve a PSRR of −52 dB and −64dB at 1and 10 kHz, respectively. The input voltage is ranged from 2.70 to 5V for a load current 100mA and an output voltage of 1.5V.
机译:本文提出了一种用于低成本便携式电子产品的低噪声,高PSRR低压降稳压器。拟议的LDO使用带有米勒R-C补偿的运算跨导放大器(OTA),以确保大于62°的稳定相位裕量。提出的稳压器的有源芯片仅为150×680 um2。该设计在Cadence中使用90 nm混合信号2P9M CMOS工艺进行了仿真和仿真,仿真结果表明,该LDO输出电压可实现小于0.10%的线路调整率和小于0.25%的负载调整率以及低静态电流。仅90uA的噪声和仅65 nV / SqrtHz的超低噪声。此外,它在1 kHz和10 kHz时的PSRR分别为-52 dB和-64dB。对于100mA的负载电流和1.5V的输出电压,输入电压的范围为2.70至5V。

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