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首页> 外文期刊>Circuits and Systems II: Express Briefs, IEEE Transactions on >A Low-Power High-PSRR Low-Dropout Regulator With Bulk-Gate Controlled Circuit
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A Low-Power High-PSRR Low-Dropout Regulator With Bulk-Gate Controlled Circuit

机译:具有体门控制电路的低功耗高PSRR低压降稳压器

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摘要

In this brief, we presented a bulk-gate controlled circuit for improving a power supply rejection ratio (PSRR) of a low-dropout voltage regulator (LDO), which deteriorated due to lowering of a power consumption. A test chip was fabricated using a 0.18-¿m complimentary metal-oxide-semiconductor process, and experimental results demonstrated that the proposed circuit provides the PSRR that improved to 77 dB at 10 Hz and 64.3 dB at 1 kHz, while the consumption current of the whole LDO with all component circuits was 8.5 ¿A without a load and 35 ¿A with a full load.
机译:在本简介中,我们介绍了一种用于改善低压差稳压器(LDO)的电源抑制比(PSRR)的体栅控制电路,该稳压器由于功耗降低而恶化。使用0.18μm的互补金属氧化物半导体工艺制造了测试芯片,实验结果表明,所提出的电路提供的PSRR在10 Hz时提高到77 dB,在1 Hz时提高到64.3 dB。 kHz,而所有LDO的所有组成电路的消耗电流在无负载时为8.5 A,在满负载时为35A。

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