Self-Adaptive VDD Scaling (SAVS) technique achieves power/energy reduction by dynamically scaling VDD for the prevailing conditions. However, when applied in sub-threshold (sub-Vt) region, robustness issues need to be addressed due to the severe delay uncertainty associated with sub-Vt Process, Voltage, and Temperature (PVT) variations. To ensure robustness for sub-Vt SAVS, we adopt the asynchronous-logic (async) Quasi-Delay-Insensitive (QDI) approach. To address the usual power/energy overheads associated with conventional async QDI systems, we further propose a hardware-simplified version of QDI (‘pseudo-QDI’) with an easy-to-met implicit timing. Prototype ICs embodying async filter banks realized in both the conventional QDI and pseudo-QDI have demonstrated the extreme robustness of the proposed approach against sub-Vt PVT variations. Measurement results further suggest pseudo-QDI's energy (∼40% lower) and area (∼1.34× smaller) advantages as compared to its conventional QDI counterpart.
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机译：自适应V DD 缩放（SAVS）技术通过针对当前条件动态缩放V DD 来实现功耗/能耗降低。但是，在亚阈值（sub-V t ）区域中应用时，由于与sub-V t 过程相关的严重延迟不确定性，需要解决鲁棒性问题，电压和温度（PVT）变化。为了确保sub-V t SAVS的鲁棒性，我们采用了异步逻辑（异步）准延迟不敏感（QDI）方法。为了解决与常规异步QDI系统相关的常见功率/能量开销，我们进一步提出了一种具有易于满足的隐式时序的硬件简化版本的QDI（“伪QDI”）。包含在常规QDI和伪QDI中都实现的异步滤波器组的原型IC证明了所提出的方法针对V-inf> t PVT变化的极强鲁棒性。测量结果进一步表明，与传统的QDI同类产品相比，伪QDI的能量（低40％）和面积（小1.34倍）优势。
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