Reduced Pull-in Time of Phase-locked Loops with a Novel Nonlinear Phase-frequency Detector

摘要

A novel nonlinear phase-frequency detector (PFD) is presented to achieve a fast-switching phase-locked loop (PLL)-based frequency synthesizer. Compared with the conventional nonlinear PFD, the proposed topology can further reduce the PLL acquisition time while the loop stability remains unchanged. Moreover, the new topology can decrease the capacitance value and the charge-pump current to 1/k: of a conventional one as the loop bandwidth increases k times, thus saving substantial chip area and power consumption.