Rapid PN Code Acquisition Technology Based on DDMF and its FPGA Implementation

机译：基于DDMF的快速PN码获取技术及其FPGA实现

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This paper introduces the theory of Digital Differential Matched Filter (DDMF), a rapid PN code acquisition scheme based on FPGA is proposed by using the DDMF, and compared with the convention digital matched filter, the scheme saves lots of the hardware resource and power.

机译：本文介绍了数字差分匹配滤波器（DDMF）的原理，提出了一种基于FPGA的基于FPGA的快速PN码获取方案，与传统的数字匹配滤波器相比，该方案节省了大量的硬件资源和功耗。

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来源
《2004 China-Japan Joint Meeting on Microwaves》|2004年|P.542-546|共5页
会议地点 Harbin(CN)
作者
ZHAO Hong-lin; LIU Da-lin;
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作者单位

Communication Research Center, Harbin Institute of Technology, POBox 312,92 Xidazhi Street, Harbin, China, 150001;

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会议组织
原文格式 PDF
正文语种 eng
中图分类激光技术、微波激射技术;
关键词
DDMF FPGA rapid acquisition hardware resource and power;

机译：DDMF FPGA快速获取硬件资源和功能;

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1. FPGA implementation of rapid PN code acquisition using iterative message passing algorithms [J] . Wei Wang, Zhihua Wang Aerospace and Electronic Systems Magazine, IEEE . 2014,第6期

机译：使用迭代消息传递算法的快速PN码采集的FPGA实现
2. Implementing Double Error Correction Orthogonal Latin Squares Codes in SRAM-based FPGAs [J] . Demirci Mustafa, Reviriego Pedro, Antonio Maestro Juan Microelectronics & Reliability . 2016,第Jana期

机译：在基于SRAM的FPGA中实现双纠错正交拉丁方码
3. LTE系统物理层下行链路Turbo编码器的FPGA 设计与实现 The Design and Implementation of Turbo Coder in the Physical Down-Link of LTE Systems Based on FPGA [J] . Computer Science and Application . 2011,第1期

机译：LTE系统物理层下行链路Turbo编码器的FPGA 设计与实现 The Design and Implementation of Turbo Coder in the Physical Down-Link of LTE Systems Based on FPGA
4. Rapid PN Code Acquisition Technology Based on DDMF and its FPGA Implementation [C] . ZHAO Hong-lin, LIU Da-lin China-Japan Joint Meeting on Microwaves . 2004

机译：基于DDMF及其FPGA实现的快速PN码采集技术
5. Design and FPGA implementation of trellis coded modem based on DVB standard. [D] . Nikfal, Danial. 2005

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机译：信号处理方法的实现及其使用FPGA技术的多载波调制的硬件实现。在移动和无线应用中使用HDL编码在DWT上验证和实现多载波调制以及DWT的信道估计技术和滤波器组架构的信号处理。

Rapid PN Code Acquisition Technology Based on DDMF and its FPGA Implementation

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