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A Full-Scale 3D Finite Element Analysis for No-underfill Flip Chip Package

机译:无底装倒装芯片封装的全尺寸3D有限元分析

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摘要

This research establishes a micro-macro 3D finite element model for no underfill flip chip BGA package. The no underfill package uses a ceramic-like (CTE close to silicon) material mounted on the backside of the flip chip substrate to constrain the thermal expansion of the organic substrate and enhance the reliability of the solder joint. This work attempts to design a constrained structure to enhance the reliability of the no underfill flip chip package. For the special design of constrained structure, a full-scale 3D finite element model is needed to investigate some mechanical behaviors that cannot be revealed by the 2D finite element model. However, to establish a full-scale 3D finite element model, the large computation time is an issue. The equivalent beam concept is adopted in this research to overcome this drawback of the finite element models. The results indicate that the equivalent beam concept is a feasible methodology for reducing the computation time of the 3D finite element model. Further, the new design structure could improve package reliability, increase manufacturing throughput and thermal performance, and maintain reworkability of the flip chip structure.
机译:这项研究建立了没有底部填充倒装芯片BGA封装的微型3D有限元模型。无底填充封装使用安装在倒装芯片基板背面的类陶瓷(接近硅的CTE)材料来限制有机基板的热膨胀并提高焊接点的可靠性。这项工作试图设计一种受约束的结构,以增强无底部填充倒装芯片封装的可靠性。对于受约束的结构的特殊设计,需要一个完整的3D有限元模型来研究一些2D有限元模型无法揭示的力学行为。但是,要建立全面的3D有限元模型,大量的计算时间是个问题。本研究采用等效梁概念来克服有限元模型的这一缺点。结果表明,等效梁概念是减少3D有限元模型计算时间的可行方法。此外,新的设计结构可以提高封装的可靠性,提高制造产量和热性能,并保持倒装芯片结构的可返工性。

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