A wafer scale integration neural network utilizing completelydigital circuits

摘要

A wafer scale integration (WSI) neural network utilizingcompletely digital circuits is reported. Three new technologies areused: (1) time-sharing digital bus; (2) efficient utilization of weightstorage; and (3) redundant learning control circuit. Items 1 and 2enable more than 500 neurons and effectively more than 30000 synapses tobe fabricated on a 5-in silicon wafer. Item 3 enables a very high yieldto be realized on one silicon wafer using a 0.8 μm CMOS process