an automated test rig for testing the EUT comprising a processing unit and program and/or data memory, an automated test rig comprising a test controller, one or more interfaces to the EUT and shared memory; how to test

摘要

An embodiment of the present invention is an automated test equipment (ATE) for testing a device under test (DUT) comprising a processing device and a program and/or data memory, wherein the processing device is to execute code from the program and/or data memory. can The automated test rig is configured to establish communication, for example, by uploading a program to the DUT using a first interface, such as a debug interface or a debug access port or a generic interface, that can access the processing device for external control. A common use case for the first interface is debug access to a DUT that typically requires a limited data rate. In the case of the present invention, the first interface is an ATE access for test execution, for example an interface allowing access to processing device registers. The first interface is configured to open a second interface through which the DUT runs at a much higher data rate than the first interface for further communication. Additionally, the second interface may have extended functionality compared to the first interface, such as providing its own memory as general system memory to the processing unit of the DUT, except for possibly slower access times.