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UNIFIED MATERIAL-TO-SYSTEMS SIMULATION, DESIGN, AND VERIFICATION FOR SEMICONDUCTOR DESIGN AND MANUFACTURING
UNIFIED MATERIAL-TO-SYSTEMS SIMULATION, DESIGN, AND VERIFICATION FOR SEMICONDUCTOR DESIGN AND MANUFACTURING
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机译:半导体设计和制造的统一材料到系统仿真,设计和验证
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摘要
A complete, unified material-to-systems simulation, design, and verification method for semiconductor design and manufacturing may include evaluating effects of semiconductor material or process changes on software algorithms. The method may include generating primitive circuit structures using the material or process changes; performing an electrical characterization of the primitive circuit structures; providing an output of the electrical characterization to a script to generate compact models; generating a digital system based on the compact models; and evaluating a performance of a software algorithm on the digital system to determine an effect of the material or process change for the semiconductor manufacturing process.
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