首页>
外国专利>
Hardware accelerator template and design framework for implementing recurrent neural networks
Hardware accelerator template and design framework for implementing recurrent neural networks
展开▼
机译:硬件加速器模板和实施反复性神经网络的设计框架
展开▼
页面导航
摘要
著录项
相似文献
摘要
Hardware accelerator templates and design frameworks for implementing recurrent neural networks (RNNs) and variants thereof are described. A design framework module obtains a flow graph for an RNN algorithm. The flow graph identifies operations to be performed to implement the RNN algorithm and further identifies data dependencies between ones of the operations. The operations include matrix operations and vector operations. The design framework module maps the operations of the flow graph to an accelerator hardware template, yielding an accelerator instance comprising register transfer language code that describes how one or more matrix processing units and one or more vector processing units are to be arranged to perform the RNN algorithm. At least one of the one or more MPUs, as part of implementing the RNN algorithm, is to directly provide or directly receive a value from one of the one or more VPUs.
展开▼