METHOD OF DESIGNING A DATAPATH IN A SEMICONDUCTOR COMPONENT, AND SEMICONDUCTOR COMPONENT HAVING A DATAPATH

摘要

A method of designing a datapath between two memory units in a semiconductor component. The datapath includes two or more positions for cells, each cell having a rising edge and a falling edge. The method includes selecting for each of the two or more positions a cell type from a library comprising available cells. Each available cell is able to perform an operation, and each cell having a P region and an N region and being P/N imbalanced. The cell type is selected in dependence of a switching point of a preferred edge to be used in the operation. The preferred edge is either the rising edge or the falling edge of the cell.