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METHODS AND APPARATUS FOR IMPROVED FAILURE MODE AND EFFECTS ANALYSIS

机译:改进失效模式和效果分析的方法和装置

摘要

A processor generates a first allocation matrix and accesses a representation of relationships between individual system elements, representing lower-level system elements to be considered at a current-level of design of a product, with each other. The processor creates an element entry in the first allocation matrix for at least a subset of the individual system elements and creates an element entry in the first allocation matrix for one or more directional relationships between the individual system elements as indicated in the representation. The processor creates function and requirements entries in the first allocation matrix based on pre-existing requirements for the product applicable to the current-level of design and generates additional function and requirements, as well as creates corresponding entries in the first allocation matrix, based on current-level architectural requirements, including at least functions and requirements for one or more of the directional relationships indicated in the representation.
机译:处理器生成第一分配矩阵,并访问各个系统元素之间的关系的表示,表示彼此以产品的电流级别考虑的较低级系统元素。处理器在第一分配矩阵中创建一个元素条目,用于单个系统元素的至少一个子集,并在第一分配矩阵中创建一个或多个方向关系的一个或多个方向关系,如表示在表示中所示。根据适用于当前设计的产品的预先存在的要求,处理器在第一个分配矩阵中创建函数和需求条目,并基于以下基于当前级架构要求,包括表示表示中指示的一个或多个定向关系的功能和要求。

著录项

  • 公开/公告号US2021406105A1

    专利类型

  • 公开/公告日2021-12-30

    原文格式PDF

  • 申请/专利权人 OMNEX SYSTEMS LLC;

    申请/专利号US202016913759

  • 发明设计人 CHANDRAN KYMAL;GREGORY FRANCIS GRUSKA;

    申请日2020-06-26

  • 分类号G06F11/07;

  • 国家 US

  • 入库时间 2022-08-24 23:07:35

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