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System and method for application specific integrated circuit design

机译:专用集成电路设计的系统和方法

摘要

Systems and methods for application specific integrated circuit design using Chronos Links are disclosed. A Chronos Link is an ASIC on-chip and off-chip interconnect communication protocol that allows interfaces to transmit and receive information. The protocol may utilize messages or signals to indicate the availability and/or readiness of information to be exchanged between a producer and a consumer allowing the communication to be placed on hold and to be resumed seamlessly. A method includes inserting gaskets and channel repeaters connected to interfaces of multiple intellectual property (IP) blocks in order to replace traditional links with Chronos Links; performing simplified floorplanning; performing simplified placement; performing simplified clock tree synthesis (CTS) and routing; and performing simplified timing closure.
机译:公开了使用ChronoS链路的应用特定集成电路设计的系统和方法。 ChronoS链路是芯片片上和片外互连通信协议,允许接口传输和接收信息。 该协议可以利用消息或信号来指示要在生产者和消费者之间交换的信息的可用性和/或准备情况,允许允许通信被放置在保持并且被无缝地恢复。 一种方法包括插入垫圈和通道中继器,连接到多个知识产权(IP)块的接口,以便用Chronos Links取代传统链接; 表演简化的平面图; 执行简化的展示位置; 执行简化的时钟树综合(CTS)和路由; 并执行简化的时序闭合。

著录项

  • 公开/公告号US11205029B2

    专利类型

  • 公开/公告日2021-12-21

    原文格式PDF

  • 申请/专利权人 CHRONOS TECH LLC;

    申请/专利号US201916673647

  • 发明设计人 STEFANO GIACONI;GIACOMO RINALDI;

    申请日2019-11-04

  • 分类号G06F30/327;G06F30/35;G06F30/367;G06F30/392;G06F30/394;G06F115/08;G06F119/12;

  • 国家 US

  • 入库时间 2022-08-24 22:55:43

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