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error correction decoder error correction circuit having the error correction decoder and operating method of the error correction decoder

机译:具有纠错解码器的纠错解码器纠错电路和纠错解码器的操作方法

摘要

According to the present invention, an operation unit for outputting an error correction message by performing an iterative decoding operation on a first codeword; a syndrome generator generating a syndrome by calculating the error correction message and a parity check matrix, and outputting a number of iterations of the iterative decoding operation and an unsatisfied check node (UCN) value included in the syndrome; and a speed selector for outputting a speed code for adjusting the speed of the iterative decoding operation according to the number of repetitions and the UCN value, wherein the calculating unit resets the speed of the iterative decoding operation according to the speed code, An error correction decoder that performs the iterative decoding operation according to a reset speed when two codewords are input, an error correction circuit including the same, and an operating method of the error correction decoder.
机译:根据本发明,通过对第一码字执行迭代解码操作来输出纠错消息的操作单元; 通过计算纠错消息和奇偶校验矩阵来生成综合征的综合征生成器,并输出迭代解码操作的多个迭代以及综合征中包括的不满意的检查节点(UCN)值; 和速度选择器,用于输出根据重复次数和UCN值的用于调整迭代解码操作的速度的速度选择器,其中,计算单元根据速度代码重置迭代解码操作的速度,纠错 当输入两个码字时,根据复位速度执行迭代解码操作的解码器,包括相同的纠错电路和纠错解码器的操作方法。

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