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LOW ETCH PIT DENSITY, LOW SLIP LINE DENSITY, AND LOW STRAIN INDIUM PHOSPHIDE

机译:低蚀刻坑密度,低滑线密度和低应变磷化铟

摘要

Methods and wafers for low etch pit density, low slip line density, and low strain indium phosphide are disclosed and may include an indium phosphide single crystal wafer having a diameter of 4 inches or greater, having a measured etch pit density of less than 500 cm-2, and having fewer than 5 dislocations or slip lines as measured by x-ray diffraction imaging. The wafer may have a measured etch pit density of 200 cm-2 or less, or 100 cm-2 or less, or 10 cm-2 or less. The wafer may have a diameter of 6 inches or greater. An area of the wafer with a measured etch pit density of zero may at least 80% of the total area of the surface. An area of the wafer with a measured etch pit density of zero may be at least 90% of the total area of the surface.
机译:用于低蚀刻坑密度,低滑线密度和低应变磷化铟的方法和晶片公开,并且可以包括直径为4英寸或更大的磷化铟单晶晶片,具有小于500cm的测量蚀刻坑密度 - 通过X射线衍射成像测量,具有少于5个位错或滑线。 晶片可以具有200cm-2或更小,或100cm-2或更小,或10cm-2或更小的测量蚀刻坑密度。 晶片可以具有6英寸或更大的直径。 具有测量蚀刻坑密度的晶片的区域可以至少为表面总面积的至少80%。 具有测量蚀刻坑密度为零的晶片的区域可以是表面总面积的至少90%。

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