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POWER MOSFET WITH REDUCED CURRENT LEAKAGE AND METHOD OF FABRICATING THE POWER MOSFET
POWER MOSFET WITH REDUCED CURRENT LEAKAGE AND METHOD OF FABRICATING THE POWER MOSFET
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机译:功率MOSFET降低电流泄漏和制造功率MOSFET的方法
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摘要
An integrated circuit includes a polysilicon region that is doped with a dopant. A portion of the polysilicon region is converted to a polyoxide region which includes un-oxidized dopant ions. A stack of layers overlies over the polyoxide region. The stack of layers includes: a first ozone-assisted sub-atmospheric pressure thermal chemical vapor deposition (O3 SACVD) TEOS layer; and a second O3 SACVD TEOS layer; wherein the first and second O3 SACVD TEOS layers are separated from each other by a dielectric region. A thermally annealing is performed at a temperature which induces outgassing of passivation atoms from the first and second O3 SACVD TEOS layers to migrate to passivate interface charges due to the presence of un-oxidized dopant ions in the polyoxide region.
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