首页> 外国专利> INTEGRATED CIRCUIT WITH SELF-TEST CIRCUIT, METHOD FOR OPERATING AN INTEGRATED CIRCUIT WITH SELF-TEST CIRCUIT, MULTI-CORE PROCESSOR DEVICE AND METHOD FOR OPERATING A MULTI-CORE PROCESSOR DEVICE

INTEGRATED CIRCUIT WITH SELF-TEST CIRCUIT, METHOD FOR OPERATING AN INTEGRATED CIRCUIT WITH SELF-TEST CIRCUIT, MULTI-CORE PROCESSOR DEVICE AND METHOD FOR OPERATING A MULTI-CORE PROCESSOR DEVICE

机译:具有自检电路的集成电路,用于操作具有自测试电路的集成电路的方法,多核处理器设备和用于操作多核处理器设备的方法

摘要

An integrated circuit with self-test circuit is provided. The integrated circuit includes at least one logic circuit, at least one input storage element for storing work data, at least one output storage element, an input test storage element for storing test data, and at least one output test storage element, wherein the logic circuit is selectively connected to the input storage element on the input side, such that the input storage element provides the work data to the logic circuit, or is connected to the input test storage element on the input side, such that the input test storage element provides the test data to the logic circuit, wherein the logic circuit is further connected to the output storage element and the output test storage element on the output side, such that the logic circuit feeds data to the output storage element and/or to the output test storage element, and wherein the output storage element is configured to process the data from the logic circuit if the work data are provided to the logic circuit, and not to process the data from the logic circuit if the test data are provided to the logic circuit.
机译:被提供有自我测试电路的集成电路。该集成电路包括至少一个逻辑电路,用于存储工作数据的至少一个输入的存储元件,所述至少一个输出的存储元件,用于存储测试数据的输入测试存储元件,以及至少一个输出测试存储元件,其中,所述逻辑电路选择性地连接到所述输入侧的输入存储元件中,使得输入存储元件提供工作数据提供给逻辑电路,或连接到在输入侧输入测试存储元件中,使得输入测试存储元件提供的测试数据到所述逻辑电路,其中所述逻辑电路被进一步连接到输出存储元件和在输出侧的输出测试存储元件中,使得逻辑电路馈送数据到输出的存储元件和/或输出测试存储元件,并且其中,所述输出存储元件被配置为处理来自所述逻辑电路的数据,如果工作的数据被提供给逻辑电路,而不是处理来自逻辑电路的数据,如果测试数据被提供到逻辑电路。

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