PARAMETRIZABLE SINGLE-STROKE BINARY MULTIPLIER WITH FIXED DOT IN DIRECT AND AUXILIARY CODE

摘要

FIELD: digital signal processing.;SUBSTANCE: invention relates to the field of digital signal processing, to the structures of computing units of microprocessors. The device contains an array of one-bit multipliers, logical XOR blocks, an array of one-bit full adders and half adders.;EFFECT: increased universality due to the fact that any of the multipliers can be represented both in direct and in complementary code; improvement of parametrizability, due to the possibility of implementation for multipliers with any number of digits; reducing the size of the area and increasing the speed, due to the absence of additional adders for converting the product and a simpler topology; increased versatility due to the possibility of outputting the result in a two-row code, which allows you to use partial products further without delaying the transfer.;1 cl, 8 dwg