Memory Device performing parallel calculation process Operating Method thereof and Operation Method of Memory controller controlling memory device

摘要

A memory device according to an aspect of the inventive concept includes a plurality of banks, each bank including a memory bank including a memory cell array, and a plurality of PIM circuits disposed to correspond to the plurality of banks. Each PIM circuit includes, in response to a command/address received from the host and arithmetic logic for performing arithmetic processing using at least one of data provided from a host and information read from a corresponding bank, for the memory bank. and a control logic for controlling a memory operation or for performing a control operation so that the operation logic performs operation processing, and for the operation processing, a read operation for the plurality of banks is performed in parallel, and the plurality of banks As offsets having different values are set, information read from different positions of the memory cell array of the plurality of banks is provided to the PIM circuits.