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ACCELERATOR FOR DENSE AND SPARSE MATRIX COMPUTATIONS

机译:致密和稀疏矩阵计算的加速器

摘要

A method of increasing computer hardware efficiency of a matrix computation. The method comprises receiving at a computer processing device, digital signals encoding one or more operations of the matrix computation, each operation including one or more operands. The method further comprises, responsive to determining, by a sparse data check device of the computer processing machine, that an operation of the matrix computation includes all dense operands, forwarding the operation to a dense computation device of the computer processing machine configured to perform the operation of the matrix computation based on the dense operands. The method further comprises, responsive to determining, by the sparse data check device, that an operation of the matrix computation includes one or more sparse operands, forwarding the operation to a sparse computation device configured to perform the operation of the matrix computation.
机译:一种提高矩阵计算计算机硬件效率的方法。该方法包括在计算机处理设备处接收,编码矩阵计算的一个或多个操作的数字信号,每个操作包括一个或多个操作数。该方法还包括响应于通过计算机处理机器的稀疏数据检查设备确定矩阵计算的操作包括所有密度操作数,将操作转发到被配置为执行的计算机处理机器的密集计算设备基于密度操作数的矩阵计算的操作。该方法还包括响应于通过稀疏数据检查设备确定矩阵计算的操作包括一个或多个稀疏操作数,将操作转发到被配置为执行矩阵计算的操作的稀疏计算设备。

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