首页> 外国专利> OPERATIONAL AMPLIFIER INPUT STAGE WITH HIGH COMMON MODE VOLTAGE REJECTION

OPERATIONAL AMPLIFIER INPUT STAGE WITH HIGH COMMON MODE VOLTAGE REJECTION

机译:具有高共模电压抑制的运算放大器输入级

摘要

An apparatus has four transistors. The first and third transistors each have a gate coupled to a first input terminal and second input terminal respectively, a source coupled to a current source and to a first terminal of a bias voltage source, and a substrate coupled to a second terminal of the bias voltage source. The second and fourth transistors each have a gate coupled to the first input terminal and the second input terminal respectively, a source coupled to the drain of the first and third transistors respectively, a drain coupled to a lower voltage supply and a substrate coupled to its source. The bias voltage source increases the threshold voltages of the first and third transistors above the second and fourth transistors, respectively. This ensures that the first and third transistors turn on after the second and fourth transistors, respectively.
机译:装置具有四个晶体管。第一和第三晶体管各自具有耦合到第一输入端子和第二输入端子的栅极,耦合到电流源的源极和偏置电压源的第一端子,以及耦合到偏置的第二端子的基板电压源。第二和第四晶体管分别具有耦合到第一输入端子和第二输入端子的栅极,分别耦合到第一和第三晶体管的漏极的源极,耦合到较低电压供应的漏极和耦合到其上的基板来源。偏置电压源分别增加了第二和第四晶体管上方的第一和第三晶体管的阈值电压。这确保了第一和第三晶体管分别在第二和第四晶体管之后开启。

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