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Apparatus for determining an expected data age of memory cells

机译:用于确定存储器单元的预期数据年龄的装置

摘要

Apparatus including an array of memory cells, a plurality of access lines each corresponding to a respective plurality of memory cells of the array of memory cells and each connected to a control gate of each memory cell of its respective plurality of memory cells; and a controller for access of the array of memory cells that is configured to cause the apparatus to apply a particular voltage level to a particular access line of the plurality of access lines, and determine a value indicative of a number of memory cells of the respective plurality of memory cells for the particular access line that are activated in response to applying the particular voltage level. The controller might further be configured to determine an expected data age of the respective plurality of memory cells, and/or determine a plurality of read voltages for reading the respective plurality of memory cells.
机译:包括存储器单元阵列的装置,多个接入线,每个接入线对应于存储器单元阵列的相应多个存储器单元,并且每个存储器单元的每个存储器单元的控制栅极连接到其各自的多个存储器单元的每个存储器单元;和控制器,用于访问的存储器阵列,该存储器单元被配置为使设备将特定电压电平应用于多个接入线的特定接入线,并确定指示各个存储器单元的值响应于应用特定电压电平而被激活的特定接入线的多个存储器单元。控制器还可以被配置为确定各个多个存储器单元的预期数据年龄,和/或确定用于读取相应多个存储器单元的多个读取电压。

著录项

  • 公开/公告号US11062785B2

    专利类型

  • 公开/公告日2021-07-13

    原文格式PDF

  • 申请/专利权人 MICRON TECHNOLOGY INC.;

    申请/专利号US202016839304

  • 发明设计人 LUCA DE SANTIS;

    申请日2020-04-03

  • 分类号G11C16/26;G11C16/04;G11C16/34;G11C11/56;

  • 国家 US

  • 入库时间 2022-08-24 19:54:08

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