首页> 外国专利> PIN DIODE AND MANUFACTURING METHODE THEREOF AND THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR DIGITAL X-RAY DETECTOR AND THE DIGITAL X-RAY DETECTOR INCLUDING THE SAME

PIN DIODE AND MANUFACTURING METHODE THEREOF AND THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR DIGITAL X-RAY DETECTOR AND THE DIGITAL X-RAY DETECTOR INCLUDING THE SAME

机译:引脚二极管及其制造素材和用于数字X射线检测器的薄膜晶体管阵列基板和包括相同的数字X射线检测器

摘要

According to the present invention, since the thickness of the edge of the p-type semiconductor layer of the PIN diode is formed to be thicker than the thickness of the non-edge portion, even if some areas of the outer portion of the p-type semiconductor layer are damaged, the damage due to the thickness of the thick edge portion can be minimized. In addition, according to the present invention, it is possible to minimize the effect of damage to the outer portion of the p-type semiconductor layer by forming only the thickness of the edge portion without increasing the thickness of the non-edge portion, which is the central portion of the p-type semiconductor layer. It is possible to minimize the decrease in transmittance of the PIN diode that may occur as the thickness of the center increases. As described above, the present invention can minimize the decrease in the transmittance of the PIN diode and minimize the effect of damage to the p-type semiconductor layer. By minimizing the leakage current of the PIN diode, the characteristics of the PIN diode can be stabilized.
机译:根据本发明,由于引脚二极管的P型半导体层的边缘的厚度形成为比非边缘部分的厚度厚,即使P-的外部的一些区域型半导体层损坏,可以最小化由于厚边缘部分的厚度引起的损坏。另外,根据本发明,可以通过仅形成边缘部分的厚度而不增加非边缘部分的厚度来使P型半导体层的外部损坏对P型半导体层的外部的影响最小化,这是p型半导体层的中心部分。可以最小化在中心厚度增加时可能发生的引脚二极管的减小。如上所述,本发明可以最小化引脚二极管的透射率的降低,并最小化损坏对P型半导体层的影响。通过最小化引脚二极管的漏电流,可以稳定引脚二极管的特性。

著录项

  • 公开/公告号KR20210079974A

    专利类型

  • 公开/公告日2021-06-30

    原文格式PDF

  • 申请/专利权人 엘지디스플레이 주식회사;

    申请/专利号KR1020190172273

  • 发明设计人 김정준;한영훈;

    申请日2019-12-20

  • 分类号H01L31/105;H01L21/02;H01L21/027;H01L21/306;H01L27/146;H01L31/115;H01L31/18;

  • 国家 KR

  • 入库时间 2022-08-24 19:52:05

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