首页> 外国专利> METHOD OF FORMING SACRIFICIAL SELF-ALIGNED FEATURES FOR ASSISTING DIE-TO-DIE AND DIE-TO-WAFER DIRECT BONDING

METHOD OF FORMING SACRIFICIAL SELF-ALIGNED FEATURES FOR ASSISTING DIE-TO-DIE AND DIE-TO-WAFER DIRECT BONDING

机译:形成牺牲自对准特征的方法,用于辅助模芯和模芯直接粘合的模具和模具

摘要

A method of manufacturing a three-dimensional semiconductor device includes forming a bi-layer sacrificial stack on a top wafer and a bottom wafer each including a series of interconnects in a dielectric substrate. The bi-layer sacrificial stack includes a second sacrificial layer on a first sacrificial layer. The method also includes selectively etching the second sacrificial layers to form a first pattern of projections on the top wafer and a second pattern of projections on the bottom wafer. The first pattern of projections is configured to mesh with the second pattern of projections. The method also includes positioning the top wafer on the bottom wafer and releasing the top wafer such that engagement between the first pattern of projections and the second pattern of projections self-aligns the plurality of interconnects of the top wafer with the plurality of interconnects of the bottom wafer within a misalignment error.
机译:制造三维半导体器件的方法包括在顶部晶片上形成双层牺牲叠层,并且底部晶片包括在介电基板中的一系列互连。双层牺牲叠层包括第一牺牲层上的第二牺牲层。该方法还包括选择性地蚀刻第二牺牲层以在顶部晶片上形成第一图案的突起和底部晶片上的第二突起图案。第一凸起图案被配置为与第二突起的第二模式网格网。该方法还包括将顶部晶片定位在底部晶片上并释放顶部晶片,使得凸起的第一图案与突起的第二图案之间的接合自对准顶部晶片的多个互连与多个互连在未对准错误中的底部晶片。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号