Bus packet format displaying method for logic analyzer

摘要

A bus packet format displaying method for a logic analyzer is disclosed. The logic analyzer fetches at least one packet of a bus of an electronic device. A computer host divides a plurality of bits of a second packet section of the packet into a plurality of message partitions according to a predetermined format defined in advance. Each of the message partitions has a value. The computer host gives a message name to each of the message partitions corresponding to the values and displays the message names and the values fetched by the logic analyzer on an operating screen.