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PRECISION DIGITAL TO ANALOG CONVERSION IN THE PRESENCE OF VARIABLE AND UNCERTAIN FRACTIONAL BIT CONTRIBUTIONS
PRECISION DIGITAL TO ANALOG CONVERSION IN THE PRESENCE OF VARIABLE AND UNCERTAIN FRACTIONAL BIT CONTRIBUTIONS
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机译:精度数字到模拟转换在存在变量和不确定的分数比特贡献
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摘要
This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.
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