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Functional built-in self-test architecture in an emulation system
Functional built-in self-test architecture in an emulation system
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机译:仿真系统中的功能内置自测架构
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摘要
An emulation system may have a built-in self-test circuit to generate one or more built-in self-test instructions. The one or more built-in self-test instructions may be pseudorandom. The one or more built-in self-test instructions may cause one or more emulation processors of the emulation system to generate one or more deterministic outputs. A testing processor of the emulation system may compare the one or more deterministic outputs to detect a faulty emulation processor, a faulty emulation processor cluster, or a faulty emulation chip of the emulation system.
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