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LOW-EMI DEEP TRENCH ISOLATION TRENCH TYPE POWER SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREFOR
LOW-EMI DEEP TRENCH ISOLATION TRENCH TYPE POWER SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREFOR
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机译:低EMI深沟槽隔离沟槽型功率半导体器件及其制备方法
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摘要
The present invention relates to the technical field of power semiconductor devices, and relates to a power semiconductor device and a preparation method therefor, and particularly, a low-EMI deep trench isolation trench type power semiconductor device and a preparation method therefor. In the present invention, terminal through hole isolation is used for replacing an existing field limiting ring terminal structure, so that the terminal area is remarkably reduced, the chip costs are reduced, and the chip current density is improved. A gate metal and a back electrode structure are placed on the back surface of a semiconductor substrate, and a source metal is located on the front surface of the semiconductor substrate; during package, the source metal is welded on the package substrate, and the gate metal and the drain metal are led out by means of routing. Because the source metal is at a low potential, a point location of the package substrate is kept at a low potential, the effect of the package substrate emitting an electromagnetic field outwards is basically eliminated, and the EMI interference is reduced.
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