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LOW-EMI DEEP TRENCH ISOLATION TRENCH TYPE POWER SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREFOR

机译:低EMI深沟槽隔离沟槽型功率半导体器件及其制备方法

摘要

The present invention relates to the technical field of power semiconductor devices, and relates to a power semiconductor device and a preparation method therefor, and particularly, a low-EMI deep trench isolation trench type power semiconductor device and a preparation method therefor. In the present invention, terminal through hole isolation is used for replacing an existing field limiting ring terminal structure, so that the terminal area is remarkably reduced, the chip costs are reduced, and the chip current density is improved. A gate metal and a back electrode structure are placed on the back surface of a semiconductor substrate, and a source metal is located on the front surface of the semiconductor substrate; during package, the source metal is welded on the package substrate, and the gate metal and the drain metal are led out by means of routing. Because the source metal is at a low potential, a point location of the package substrate is kept at a low potential, the effect of the package substrate emitting an electromagnetic field outwards is basically eliminated, and the EMI interference is reduced.
机译:电力半导体器件技术领域本发明涉及功率半导体器件技术领域,并且涉及功率半导体器件和制备方法,特别是低EMI深沟槽隔离沟槽型功率半导体器件及其制备方法。在本发明中,终端通孔隔离用于更换现有的场限制环形终端结构,使得终端区域显着降低,芯片成本降低,并且芯片电流密度得到改善。栅极金属和背电极结构放置在半导体衬底的后表面上,并且源金属位于半导体衬底的前表面上;在封装期间,源金属焊接在封装基板上,栅极金属和漏极金属通过布线引出。因为源金属处于低电位,所以封装基板的点位置保持在低电位,所以封装基板向外发射电磁场向外的效果基本上消除,并且降低了EMI干扰。

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