Process and apparatus for denominational-shifting of an encoded electrical signal train

摘要

709,110. Digital electric calculating apparatus. SOC. D'ELECTRONIQUE ET D'AUTOMATISME. March 29, 1951 [March 29, 1950], No. 7361/51. Class 106 (1) A method of modifying an encoded electrical signal train having N impulse moments of duration 6 includes the steps of counting from the beginning of the train at intervals corresponding to a positive integral number m of such impulse moments but automatically restarting the counting from zero whenever an impulse appears in the encoded train so that the number n so counted at the end of the train cycle is equal to the integral part of the quantity N-K/m (where K is the number of the impulse moment where the last pulse occurs in the encoded train), automatically registering the number n so counted and utilizing the same automatically to introduce in the train, after a delay N#, a delay equal to np# (where p is a positive integer not greater than m). In one arrangement a pulse train, assumed to have eight impulse moments (8#), enters at a terminal 1 and is applied, via a valve 28, to a delay line 13, 14 ... 24. The input end of the delay line terminates in a short-circuited section 31 of electrical length #/4 whereby the impulses are converted into signals of two polarities to avoid the necessity for D.C. restoration. As the encoded train is introduced, a series of synchronized positive clock pulses is applied at a terminal 32 for the full period of the signal. Clock pulses are applied continuously at a terminal 30, and counting pulses of the required frequency (in this example half the clock pulse frequency) enter at terminal 4. The effect of the positive pulses entering at 32 on a valve 34 which is normally biased to cut-off, is to suppress the clock pulses entering at 30 and block the regenerating valve 25 so that any encoded train circulating in the delay line system is erased as the new train enters via the valve 28. The positive pulses entering at 32 also unblock a valve 36 and allow the counting pulses applied to its first grid to step on a flip-flop-type counter 5 until a significant pulse, having a substantially greater amplitude, appears at the input terminal 1, when the counter is brought back to zero. The counter 5 is of the type in which one only of the flip-flops is reversed at any time. The reversed flip-flop unblocks corresponding gate valves 22 and 9 whereby the circulating encoded pulse train is tapped from the system and appears at output terminals 23 and 10 after delays of 2n# and n# respectively. The unmodified signal is still available in the circulating system. In another embodiment, Fig. 1 (not shown) non-circulating delay lines are employed commencing with a delay N# and arranged to restore the relative position of the signal after the desired shifting operation. The circuit can also be arranged so that the coded train is shifted, not according to the last impulse in the train but in a predetermined manner.