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Improvements in or relating to electronic apparatus for translating a number from a first to a second radix of notation

机译:用于将数字从第一表示法基数转换为第二表示法的电子设备的改进或与之相关的改进

摘要

745,907. Digital electric calculating-apparatus. BRITISH TABULATING MACHINE CO., Ltd. Oct. 2, 1953 [Nov. 4, 1952], No. 27727/52. Class 106 (1). In electronic apparatus for translating a number from a first to a second radix of notation, the number being represented in the first radix by an electrical signal or signals, a limited number of stored signals representing the equivalents in one radix of values in the other are read out sequentially and used selectively in forming the translated number. In the binary-to-decimal translator shown in Fig. 1, the equivalents of successive powers of two are stored serially around a single track of a magnetic drum in coded decimal form, each decimal digit being expressed as a combination of binary digits 1, 2, 4, 8. These equivalents are read by a head 2 and passed through a gating and amplifying circuit 3 controlled by clock pulses read by a head 5 from a second track on the drum. The binary number to be translated is stored in a shifting register 4 which receives stepping pulses from a frequency-dividing counter 12 controlled by the clock pulses, whereby each binary digit, if " 1," controls the passage of the equivalent value through a gate 7 to an accumulator which comprises an adding circuit 8, e.g. as described in Specification 678,427, and a result-storing shifting register 9. In another form of translator, Fig. 2, the drum 13 stores the equivalents in binary form of the values 1, 2, 4, 8, 10, 20, 40, 80, &c. The largest equivalent is read out first and subtracted in circuit 15, which may be as described in Specification 738,269, from the binary number to be translated obtained from shifting register 16, the difference being stored in shifting register 20. According to whether this difference is positive or negative, a gate 21 or 22 is opened to allow a pulse on line 23 to enter one or zero into a result-storing shifting register 24, and to set a bi-stable double triode trigger circuit 19 in the condition to open gate 18 or 17. The latter gates respectively permit read-out of the contents of registers 20, 16 'to the subtracting circuit, and also to the input of register 16. Thus if the difference is positive it replaces the original number and has the next equivalent subtracted therefrom, the process being continued until the complete translated number has been built up in register 24 in the binary-coded decimal form with the most significant digit on the right. A control circuit (Fig. 5, not shown) is described for this arrangement. According to further modifications, a comparing circuit, e.g. as described in Specification 738,294, is used to allow subtraction only if the difference will be positive, the equivalents being passed through a delay circuit such as an electrical or mercury delay line or a shifting register before they reach the subtracting circuit, or the differences between successive equivalents are stored on a separate drum track, these differences and the equivalents being selectively read out to an add/subtract circuit. Circuit details of various components are given. According to the Provisional Specification, the binary coded decimal number obtained may be read out in the form of timed impulses which operate printing or punching magnets (one for each decimal digit). Reference is made also to scales of three, twelve and twenty.
机译:745,907。数字式电子计算设备。英国制浆机械有限公司。1953年10月2日[十一月。 1952年4月],第27727/52号。 106级(1)。在用于将数字从符号的第一基数转换为第二基数的电子设备中,数字在第一基数中由一个或多个电信号表示,有限数量的存储信号表示一个值的基数中的等价物。顺序读出并有选择地用于形成转换后的数字。在图1所示的二进制到十进制转换器中,两个连续的幂的等效项以编码的十进制形式连续存储在磁鼓的单个磁道周围,每个十进制数字表示为二进制数字的组合1, 2、2、4、8。这些等效物由磁头2读取,并通过门控和放大电路3,该电路由磁头5从鼓上的第二磁道读取的时钟脉冲控制。待转换的二进制数存储在移位寄存器4中,移位寄存器4从分频计数器12接收由时钟脉冲控制的步进脉冲,由此每个二进制数字(如果为“ 1”,则控制等效值通过门)通过图7所示的实施例是一个累加器,该累加器包括一个加法电路8,例如如规格678,427中所述,以及一个结果存储移位寄存器9。在图2的另一种翻译器形式中,感光鼓13以二进制形式存储值1、2、4、8、10、20、40的等价物。 ,80岁及以下。首先从电路中读出最大的等效值,然后在电路15中减去,如规范738,269所述,从移位寄存器16获得的要转换的二进制数中减去该差值,然后将其差值存储在移位寄存器20中。正或负,门21或22被打开,以允许线23上的脉冲将一个或零输入到结果存储移位寄存器24中,并在打开门的条件下设置双稳态双三极管触发电路19 18或17。后面的门分别允许将寄存器20、16'的内容读出到减法电路,也读出到寄存器16的输入。因此,如果差为正,它将替换原始数字并具有下一个从中减去等效值,该过程继续进行,直到在寄存器24中以二进制编码的十进制形式建立了完整的转换数,并且右边的最高有效位。描述了用于这种布置的控制电路(图5,未示出)。根据进一步的修改,比较电路,例如:如规范738,294中所述,仅当相差为正,等效项在到达减法电路之前通过电气或汞延迟线或移位寄存器之类的延迟电路或它们之间的差时才用于减法连续的等效项存储在单独的磁鼓轨道上,这些差异和等效项被有选择地读出到加/减电路。给出了各种组件的电路细节。根据临时规范,可以以定时脉冲的形式读取获得的二进制编码的十进制数字,该脉冲可操作打印或打孔磁铁(每个十进制数字一个)。还参考了三,十二和二十的音阶。

著录项

  • 公开/公告号GB745907A

    专利类型

  • 公开/公告日1956-03-07

    原文格式PDF

  • 申请/专利权人 THE BRITISH TABULATING MACHINE COMPANY LIMITED;

    申请/专利号GB19520027727

  • 发明设计人 BIRD RAYMOND;

    申请日1952-11-04

  • 分类号H03M7/08;H03M7/12;

  • 国家 GB

  • 入库时间 2022-08-23 22:49:01

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