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method for testing a variety of on a single halbleiterscheibe produced simultaneously the same semiconductor components with pn transition

机译:种方法,用于测试同时生产具有pn跃迁的相同半导体组件的单个halbleiterscheibe的各种

摘要

1332586 Testing semi-conductor components SIEMENS AG 5 Aug 1971 [18 Aug 1970] 36754/71 Heading G1U [Also in Division H1 In a method of simultaneously producing plural identical semi-conductor components each having at least one p n junction in the face of a single wafer and thereafter subdividing the wafer, the individual components are tested by bringing the wafer face in contact with an electrolytic bath Fig.1 (not shown) capable of anodic oxidation wherein a potentiometrically controlled direct current is applied between a cathode and the rear face of the wafer, which is retained and contacted by a suction tube. An insulant layer protects the blocking junctions intermediate the front and rear of the wafer from the electrolyte. A control voltage appears between the faces of the wafer, and the fronts of the elements whose breakdown voltage is in defect of this are anodically oxidized or have material removed therefrom so as to permit recognition, by colour change or removal of electrode material; and satisfactory elements remain unchanged. The rear of the wafer may have a common electrode if it comprises plural zones inset to a common n zone. If however plural n zones are inset to a common p zone, plural contacts are applied to the individual zones of the rear surface with current reversal, the common zone is immersed, and oxidation or removal occurs on that surface in positions opposed to faulty components. Alternatively the wafer may be the cathode to a solution of a salt of the contact electrode metal, and metal deposition occurs on the faulty components; or the p n junctions of the system may receive alternating current excitation whose peak approximates the required current tolerance, when deposition will occur in satisfactory components; the wafer surface being connected to form a negative electrode and the junctions biased in the sense of current flow. In e.g. an array of planar diodes Fig.2 (not shown) formed by diffusion of p type zones into a n type wafer through apertures of a S i O 2 mask, the p zones contact the electrolyte while the n zone is negatively connected in relation to the p zone. A shortcircuited element is coated with metal on negative halfwaves which is removed on positive halfwaves, while an intact element is reverse biased during positive halfwaves so that the metal remains deposited. Negative peaks exceed the diode diffusion voltage while positive peaks do not exceed its breakdown voltage. A. C. may be superimposed on positive D.C. by connecting a rectifier across an A. C. fed potentiometer with negative peak voltage exceeding the applied direct voltage to metallize those elements whose reverse voltage exceeds the positive direct voltage; the sum of which with the positive peak does not exceed the reverse voltage.
机译:1332586测试半导体组件SIEMENS AG 1971年8月5日[1970年8月18日]标题G1U [也在H1分部中]一种同时生产多个相同的半导体组件的方法,每个半导体组件的一个表面至少具有一个pn结。单个晶片,然后细分晶片,通过使晶片表面与能够进行阳极氧化的图1(未显示)的电解槽接触来测试各个组件,其中在阴极和背面之间施加了电位控制的直流电晶片被吸管保持并接触。绝缘层保护晶片前后之间的阻挡结不受电解质的影响。控制电压出现在晶片的表面之间,并且其击穿电压有缺陷的元件的正面被阳极氧化或从其中去除了材料,从而可以通过变色或去除电极材料来识别。满意的要素保持不变。如果晶片的背面包括插入公共n区的多个区,则晶片的后部可以具有公共电极。但是,如果将多个n个区域插入到一个公共p区域中,则在电流反向的情况下将多个触点应用于后表面的各个区域,将公共区域浸没,并且在该表面上与故障组件相对的位置发生氧化或去除。或者,晶片可以是接触电极金属盐溶液的阴极,并且在有缺陷的组件上会发生金属沉积;当沉积在令人满意的组件中时,或者系统的p n结可能接收交流励磁,其峰值接近所需的电流容限;晶片表面被连接以形成负极,并且结在电流的意义上被偏置。例如图2的平面二极管阵列(未显示),是通过p型区域通过S i O 2掩模的孔扩散到型晶片中而形成的,p型区域与电解质接触,而n型区域相对于电解质负向连接p区。短路的元件在负半波上涂有金属,在正半波上将其去除,而完整的元件在正半波期间会被反向偏置,从而使金属保持沉积状态。负峰值超过二极管扩散电压,而正峰值不超过其击穿电压。通过在交流馈电电位计两端连接整流器,使交流峰值叠加在正直流电极上,负峰值电压超过施加的直流电压,使反向电压超过正直流电压的那些元件金属化;其正峰值之和不超过反向电压。

著录项

  • 公开/公告号CH524827A

    专利类型

  • 公开/公告日1972-06-30

    原文格式PDF

  • 申请/专利权人 SIEMENS AKTIENGESELLSCHAFT;

    申请/专利号CH19710010332

  • 发明设计人 SPAETHWERNER;

    申请日1971-07-14

  • 分类号G01R31/26;

  • 国家 CH

  • 入库时间 2022-08-23 08:39:27

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