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High-speed error-proof data transmission - has microprogrammes for control with parity bit generator and register

机译:高速防错数据传输-具有用于通过奇偶校验位生成器和寄存器进行控制的微程序

摘要

The receiver determines a transmission error by means of parity testing circuits. When there is an error present, an error indication is stored automatically. The defective data element is given a parity corresponding to the defective information by means of a generator circuit. The data block is then transmitted completely and after transmission the error indication is requested by the control microprogramme. When the errors have appeared, the data block is transmitted once more.
机译:接收器通过奇偶校验测试电路确定传输错误。存在错误时,将自动存储错误指示。借助于生成器电路,为缺陷数据元素提供与缺陷信息相对应的奇偶校验。数据块然后被完全发送,并且在发送之后,控制微程序请求错误指示。错误出现后,将再次发送数据块。

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