Switching arrangement for dynamic MOS memory module - has decoder ccts with inputs receiving negated or unnegated address signals

摘要

The switching arrangement has connected to the output of each decoder circuit a transistor whose controlled stage lies between a line lead and a generator for triggering the reading operation. The generation is controlled by address signals supplied to the decoder circuits. The generator is so designed that its output signal has the same time behaviour as the output signal from the slowest decoder circuit. In a switching arrangement where the decoder circuits consist of dynamic NOR elements, the generator consists of a dynamic NOR element and an inverter connected to the NOR element.