Kodeniratsuchikudokairo

摘要

1522823 Integrated circuits INTERNATIONAL BUSINESS MACHINES CORP 29 Sept 1975 [14 Nov 1974] 39720/75 Heading H1K [Also in Division H3] An integrated circuit comprising 36 latching drivers (Figs. 3 and 4, not shown, see Division H3) is formed on a P-type silicon wafer 60. Each latching driver comprises a high voltage switch formed by a series-connected pair of complementary transistors controlled by a silicon controlled switch formed by a reciprocally coupled complementary pair of transistors T2, T3. A N + sub-collector region 76 is diffused on to the wafer 60 and an N-type epitaxial layer 62 grown on top. P+ isolation region 64 is diffused into the epitaxial layer 62 to form isolation islands (Figs. 5a, 5b, not shown). Diffusion 66 forms the collector of transistor T2 and the base of T3 of the silicon controlled switch. Diffusion 68 forms the base of T2 and the collector of T3. Epitaxial region 70 forms the emitter of T2 while diffusion 74 forms the emitter of T3. A metallized layer (90) (Fig. 5b, not shown) forms a connection to the emitter 74 of T3 whilst a further metallized layer (92) formed over region 66 forms a connection to the collector of T2 and a guard ring for the silicon controlled switch. The region 76 forms the emitters of two PNP transistors T18, T22 of the high voltage switch. Part of the diffusion 64 serves as a base for T22, region 80 of the epitaxial layer 62 serves as the base for T18. Diffusions 78 and 68 form the emitter and collector of T18. Substrate 60 forms the collector of the vertical transistor T22: region 64 forms the collector of the lateral transistor T18. Metallization (94) connects with the emitter diffusion 78 for transistors T18, T22 and of an NPN transistor (T4, not shown).