Operating time control for time delays in communication system - has clocked delay stages in series to reduce variability due to differences in capacitor characteristics

摘要

The time delay transmission of an analogue signal in a communications system transmission process is provided by staging of identical units integrated devices and capacitor. It is claimed that the design adopted minimises the time variation due to variations in capacitor characteristics. The operating circuit consists of basic units (A) comprising two impedance converters (I1, I2) coupled in series with short circuits in the form of relays (51, 52, 53). The relays are pulse operated in a specific sequence using clock signals (T1, T2) to effect successive transfers across the stage (V2, V3, V4). The analogue signal (U1) is applied to the input of the stage. In operation the magnitude of the delay achieved is determined by the number of stages coupled in series.